Field scanning may here be understood to mean the deflection in the vertical direction of one or more electron beams in a picture display tube. However, it may alternatively relate to controlling the drive of a recording apparatus, for example the number of revolutions of the head disk and/or the tape transport of a video magnetic tape apparatus or the speed of revolution of a video disk, a field frequency and/or phase control being also necessary. Accordingly, a television device must be understood to mean both a television receiver and a picture signal display apparatus of any type.
My U.S. Pat. No. 4,319,276 discloses a circuit arrangement of this type. In this known circuit arrangement the switch over to the direct synchronization operating mode is effected after a given delay when the said given phase relationship which is usually a coincidence has not been established. If no received field synchronizing pulses are available for some reason or other, this switch will therefore be in a state such that a field oscillator which is otherwise synchronized either by the incoming field synchonizing pulses or by the divider pulses now freely oscillates at its natural frequency and this continues as long as no synchronizing pulses are present. This results in a "roll over" in the vertical direction of a displayed image.
It is an object of the invention to provide a circuit arrangement of the type mentioned above in which a free-running field oscillator is not necessary and by means of which a correct field synchronization is maintained, also in case field synchronizing pulses are not received, for example, owing to interference or the disappearance of the signal in a record carrier, while in the presence of field synchronizing pulses which are not in accordance with the standard, direct synchronization may be effected.
The invention provides a circuit arrangement which is characterized in that under the influence of a field synchronizing pulse test stage the switching stage is adapted to be in the position corresponding to the indirect synchronization mode when a predetermined number of received field synchronizing pulses is absent, while the frequency divider circuit resetting means is capable of resetting the frequency divider circuit when said pulses are present again but the said given phase relationship in the comparison stage does not exist.
For the sake of completeness it should be noted that from U.S. patent application Ser. No. 089,006 (now abandoned) it is known to adjust a sawtooth oscillator in the absence of the synchronizing signal to the nominal frequency corresponding to the standard and to switch in other cases to a lower frequency in such a manner that then direct synchronization of the sawtooth oscillator can be effected.
In accordance with one embodiment, the circuit arrangement in accordance with the invention is characterized in that the field synchronizing pulse test stage has an input for applying received field synchronizing pulses and a pulse lengthening stage for generating a test pulse occurring during a substantial portion of the field period for applying it as a control signal to the switching stage, said test pulse having a first signal level in the absence of received field synchronizing pulses and assuming a second signal level in the presence of a field synchronizing pulse.
Thus, it is ensured that, once a field synchronizing pulse has occurred, interference pulses occurring in the lengthened portion do not become active and possibly have a negative effect on the deflection or scanning, respectively. The test pulse may have its trailing edge after the beginning of the field sychronizing pulse. Thus it is ensured that an indirect synchronization by means of the frequency divider once obtained also remains active for the next period.
In accordance with another further embodiment the circuit arrangement in accordance with the invention is characterized by a pulse shaper stage for generating a substitution pulse for the direct synchronization in the absence of a received field synchronizing pulse.
In the circuit arrangement in accordance with the invention identification of the equalizing pulses occurring according to the standard in the synchronizing signal can be effected in a simple manner. These pulses are spaced by half a line period, so they occur at twice the line frequency. A circuit arrangement with identification of equalizing pulses contained in the received synchronizing signal may be characterized by a generator for generating a comparison signal which comprises pulses of the line frequency which are shifted half a line period relative to the received line synchronizing pulses and by means for applying said comparison signal together with the received synchronizing signal to a coincidence stage for generating, when coincidence is established, a switching signal for adjusting the switching stage to the position corresponding to the indirect synchronization.
In one embodiment the circuit arrangement in accordance with the invention is characterized in that the frequency divider circuit resetting means is provided with a switch for interrupting the supply of reset pulses to the frequency divider circuit while the lead between the field synchronizing pulse test stage and the switching stage is also provided by a switch for interrupting said lead, both said switches being closed when said given phase relationship has not existed for said predetermined period of time for thus allowing the frequency divider circuit to be reset and the switching stage to be in the position corresponding to the indirect synchronization mode and being opened when said phase relationship is established in the comparison stage.